The protection of information and communications infrastructures against unauthorized accesses threatening data integrity, confidentiality and availability is a buoyant field of research and commercial innovations which has grown and evolved significantly over the recent years because of the constant battle between those looking to improve security and those looking to circumvent it.
Among the security threats, integrated circuits’ vulnerability to side channel analysis and fault attacks is one of the most important one since it is correlated to the ubiquitous use of cryptography by those circuits in a whole plethora of applications managing users’ authentication, data confidentiality and privacy. Indeed, these attacks are based on information gained from the physical implementation of a cryptosystem, rather than brute force or theoretical weaknesses in the cryptographic algorithms. Therefore, countermeasures to side channel analysis and fault attacks are a major stake in information security.
The main objective of the PHISIC workshop is to provide an environment for exchange among academic and industrial stakeholders of the embedded security arena, more precisely to:
This workshop is supported by the “Secured Communicating Solutions” cluster and the French National Research Agency ANR. The attendees will be given an opportunity to visit the MicroPackS™ mutualised security platform. This platform hosts six laboratories equipped for state-of-the-art hardware security characterizations.